With the continuous development of semiconductor technology, the critical dimension (CD) of semiconductor devices such as Metal-Oxide-Semiconductor (MOS) transistors has become increasingly smaller, and chips have become more highly integrated, resulting in more devices on a single chip. Some high-performance products, e.g., CPU, may even have more than a billion integrated devices. With such a high level of integration, a large amount of heat will be generated in the operation of the chip, and the resulting temperature rise may affect the performance of the chip.
Heat dissipation is difficult in chips that are highly integrated. The problem is even worse for high level technology node where copper interconnects and low dielectric constant (low-K) dielectrics are widely used, because low-K dielectrics have low thermal conductivity.
In the prior art, a common heat dissipation method comprises adding a heat sink, a fan or the like to the package, when the chip has been packaged, but this method performs poorly with chips that are highly integrated, and if a chip is used for long hours, it may still be damaged by heat.